The present invention relates to semiconductor devices, and more specifically, to nanowire devices that are arranged in a stacked configuration.
The MOSFET is a transistor used for amplifying or switching electronic signals. The MOSFET has a source, a drain, and a metal oxide gate electrode. The metal gate is electrically insulated from the main semiconductor n-channel or p-channel by a thin layer of insulating material, for example, silicon dioxide or glass, which makes the input resistance of the MOSFET relatively high. The gate voltage controls whether the path from drain to source is an open circuit (“off”) or a resistive path (“on”).
N-type field effect transistors (NFET) and p-type field effect transistors (PFET) are two types of complementary MOSFETs. The NFET uses electrons as the current carriers and with n-doped source and drain junctions. The PFET uses holes as the current carriers and with p-doped source and drain junctions.
Nanowire field effect transistor (FET) devices are gate all around devices that include a nanowire channel region with gate material arranged around the nanowire channel. FinFET devices are multi-gate devices with fins formed on a substrate and a gate stack arranged over a channel region of the fin.